Dual-core execution
The P1021 device supplies two 800 MHz cores for application and I/O processing within each processor module.
TRICONEXSafety and critical control systems
TRICON V11.X · Main Processor
DUAL-CORE MAIN PROCESSOR
Triconex 3009 Main Processor
Triplicated execution, memory voting and controller diagnostics
SECTION 01
Product Description
Within a Tricon v11.x controller, the Triconex 3009 is the Main Processor that executes application and I/O work as one member of the three-processor set. Its P1021 dual-core device, memory resources and TriBus interface are organized so each processor operates autonomously while controller data is compared across all three channels.
Application data in the 3009 uses 256 MB of non-battery-backed DRAM, while retained variables and disabled-point configuration use 2 MB of battery-backed SRAM. The 128 MB Flash PROM holds nonvolatile program material, keeping transient working data, retained values and stored code on distinct memory paths.
At the chassis boundary, the 3009 exchanges I/O over an RS-485 interface and communication-module data over a separate RS-485 path. Its TriBus rate changes with the chassis: 25 Mbps in an 8110 or 8100-1 and 1000 Mbps in an 8120E, so processor and chassis selection determine the interprocessor transfer rate.
SECTION 02
Product Specifications
| Technical Item | 3009 |
|---|---|
| Brand | Triconex |
| Product Type | Main Processor |
| Compatible System | Tricon v11.x |
| Main Processor | QorIQ P1021 dual core, 800 MHz |
| L1 Cache | 32 KB |
| L2 Cache | 2 MB |
| DRAM | 256 MB, without battery backup |
| SRAM / NVRAM | 2 MB, with battery backup |
| Flash PROM | 128 MB |
| TriBus Protection | 32-bit CRC and isolated 32-bit DMA |
| TriBus Speed | 25 Mbps in 8110 / 8100-1; 1000 Mbps in 8120E |
| Diagnostic Port | Optically isolated RS-232, DB-9, 115200 bps |
| I/O Interface | RS-485, 375 Kbps |
| Logic Power | 14 W |
| Processor Set per Controller | 3 Main Processors |
| Clock / Calendar | Time and date with battery backup |
| Typical Clock Drift | ±2 seconds per day |
| Maximum Clock Drift | ±2.16 seconds per day |
| Communication Interface | RS-485, 2 Mbps |
| Diagnostic Port Isolation | 500 VDC maximum |
SECTION 03
Processor Architecture and Memory Paths
The 3009 assigns application execution, I/O movement and retained information to defined processor and memory resources.
Separated memory roles
DRAM holds active program, I/O and communication data; battery-backed SRAM preserves retentives; Flash stores nonvolatile content.
Independent local operation
Each of the three Main Processors has its own clocks, regulators and circuitry instead of sharing a single execution resource.
SECTION 04
TriBus Execution and Diagnostics
The 3009 uses TriBus for processor synchronization and comparison, while local diagnostics test processor, memory and interface functions.
Hardware voting path
CRC-protected TriBus transfers and compares data among the three processors independently of the control program.
Interface checks
Diagnostics verify I/O and communication processors, shared-memory access and RS-485 transceiver loopback.
Isolated service port
The DB-9 RS-232 diagnostic port is isolated to 500 VDC and operates at 115200 bits per second for diagnostic analysis.
SECTION 05
Common Questions
How many Triconex 3009 processors are used in a controller?
Three 3009 Main Processors occupy the controller processor bank. Each module operates independently while TriBus synchronizes and compares their data. A quotation or replacement record should therefore specify one module quantity separately from the three-module controller set.
Does Triconex 3009 retain all 256 MB of DRAM without power?
No. The 256 MB DRAM is not battery backed; retained variables use the separate 2 MB battery-backed SRAM. The memory type matters when deciding whether a value is working data, retained data or stored program content.
Why does Triconex 3009 have different TriBus speeds?
The chassis sets the available path. A 3009 runs TriBus at 25 Mbps in 8110 or 8100-1 and at 1000 Mbps in 8120E. A chassis change can therefore alter processor-to-processor transfer speed without changing the 3009 model number.
What connector is used for Triconex 3009 diagnostic access?
The diagnostic interface is an optically isolated RS-232 port on a 9-pin connector. It operates at 115200 bits per second. This service connection is distinct from the RS-485 I/O and communication interfaces used during controller operation.
How are program execution and I/O handling divided inside Triconex 3009?
The P1021 architecture provides dedicated processing resources for application and I/O work. Shared data passes through defined local and TriBus paths rather than one undifferentiated memory channel. Keeping these paths separate allows application work and module-data movement to proceed through defined resources.
Do Triconex 3009 diagnostics only test the main CPU?
No. Checks also cover memory, I/O and communication processors, shared-memory access, RS-485 loopback, TriClock and TriBus interfaces. PASS, FAULT and communication indicators should be read together when isolating a processor or bus condition.
SECTION 06
Our Services
MOORE AUTOMATION
https://www.mvme.cn/Moore Automation supports product identification, quotation preparation, order coordination and export documentation for industrial control equipment. For a 3009 enquiry, the team records the exact processor number and requested quantity before commercial documents are prepared.
Product identificationQuote preparationOrder handlingExport documents
www.mvme.cn
SECTION 07
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Enquiry Information
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