Verified configuration
- The FC identity covers fail-safe CPU functions; it does not turn every standard channel into a safety channel.
- STEP 7 V20 or higher is required for the stated firmware.
14 × 24 V DCS7
121510 × 2 A · 2 × 0-10 V DC
121510 × 2 A · 2 × 0-10 V DC
Siemens 14 × 24 V DC
Siemens 6ES7215-1HF40-0XB0 SIMATIC S7-1200F CPU 1215 FC
Fail-safe CPU 1215 FC with relay outputs, two PROFINET ports and integrated mixed I/O.
Product Overview
6ES7215-1HF40-0XB0 is a SIMATIC S7-1200F CPU 1215 FC in a DC/DC/relay configuration. Fourteen digital inputs, ten relay outputs, two voltage analog inputs and two current analog outputs are integrated in the compact CPU.
Two PROFINET ports support controller and device communication. Integrated work memory is 250 KB and load memory is 4 MB, while the supply accepts 20.4 to 28.8 V DC.
Firmware V4.7 is engineered with STEP 7 V20 or higher according to the current data sheet. Siemens lists the article as active with phase-out effective 1 November 2026.
CPU1215 FC DC/DC/relay
Digital inputs14 × 24 V DC
Relay outputs10 × 2 A
Analog inputs2 × 0-10 V DC
Hardware Specifications
- CPU
- 1215 FC DC/DC/relay
- Digital inputs
- 14 × 24 V DC
- Relay outputs
- 10 × 2 A
- Analog inputs
- 2 × 0-10 V DC
- Analog outputs
- 2 × 0-20 mA DC
- PROFINET
- 2 ports
- Work memory
- 250 KB
- Load memory
- 4 MB
- Supply
- 20.4-28.8 V DC
- Net weight
- 0.436 kg
Interface and I/O Map
6ES7215-1HF40-0XB0 functional organization
Primary path
Two PROFINET ports provide the network connection.
System boundary
Integrated digital and analog channels reduce separate module requirements.
Configuration point
Relay outputs maintain galvanic contact behavior distinct from transistor FC versions.
Fail-Safe Hardware Boundary
Selection boundary
- The full HF40 order code defines relay outputs and must be preserved.
Product Lifecycle
Current status
PM300 Active Product; phase-out effective 1 November 2026.
Technical Questions
How does 6ES7215-1HF40-0XB0 implement its Interface and I/O Map function?
Two PROFINET ports provide the network connection.
Why must Fail-Safe Hardware Boundary be reviewed for 6ES7215-1HF40-0XB0?
The FC identity covers fail-safe CPU functions; it does not turn every standard channel into a safety channel.
Which CPU 1215 FC signal map arrangement applies to 6ES7215-1HF40-0XB0?
Fail-safe CPU core with integrated mixed I/O and two PROFINET ports.
Which CPU and Digital inputs values define the CPU 1215 FC signal map configuration 6ES7215-1HF40-0XB0?
CPU: 1215 FC DC/DC/relay; Digital inputs: 14 × 24 V DC.
Before commissioning 6ES7215-1HF40-0XB0, which Interface and I/O Map check matters most?
Integrated digital and analog channels reduce separate module requirements.
Which lifecycle status is documented for 6ES7215-1HF40-0XB0 when reviewing Interface and I/O Map?
PM300 Active Product; phase-out effective 1 November 2026.
No related record found