Verified configuration
- STEP 7 version must support firmware V4.7.
- One signal board, eight signal modules and three communication modules are supported by the CPU family data.
14 × 24 V DCS7
1214F10 × 2 A · 2 × 0-10 V DC
1214F10 × 2 A · 2 × 0-10 V DC
Siemens 14 × 24 V DC
Siemens 6ES7214-1HF40-0XB0 SIMATIC S7-1200F CPU 1214 FC
Compact fail-safe DC/DC/relay CPU with integrated digital and analog I/O.
Product Overview
6ES7214-1HF40-0XB0 is a SIMATIC S7-1200F CPU 1214 FC with DC supply, 24 V DC digital inputs and relay outputs. The compact hardware includes fourteen digital inputs, ten relay outputs and two voltage analog inputs.
The CPU provides 200 KB of integrated work memory and 4 MB of load memory. The 24 V supply range is 20.4 to 28.8 V DC, and the relay outputs are rated 2 A.
The current data sheet identifies firmware V4.7 and STEP 7 V20 or higher. The product remains in the active phase with a Siemens phase-out effective date of 1 November 2026.
CPU1214 FC DC/DC/relay
Digital inputs14 × 24 V DC
Relay outputs10 × 2 A
Analog inputs2 × 0-10 V DC
Hardware Specifications
- CPU
- 1214 FC DC/DC/relay
- Digital inputs
- 14 × 24 V DC
- Relay outputs
- 10 × 2 A
- Analog inputs
- 2 × 0-10 V DC
- Work memory
- 200 KB
- Load memory
- 4 MB
- Supply
- 20.4-28.8 V DC
- Firmware
- V4.7
- Engineering
- STEP 7 V20 or higher
- Net weight
- 0.388 kg
Fail-Safe I/O Map
6ES7214-1HF40-0XB0 functional organization
Primary path
Standard onboard I/O and fail-safe CPU execution share one compact unit.
System boundary
Relay outputs define a different load interface from transistor-output FC variants.
Configuration point
High-speed and safety functions must be assigned within the supported engineering configuration.
Engineering and Expansion
Selection boundary
- The SIMATIC Memory Card provides the plug-in load-memory path.
Product Lifecycle
Current status
PM300 Active Product; phase-out effective 1 November 2026.
Technical Questions
How does 6ES7214-1HF40-0XB0 implement its Fail-Safe I/O Map function?
Standard onboard I/O and fail-safe CPU execution share one compact unit.
Why must Engineering and Expansion be reviewed for 6ES7214-1HF40-0XB0?
STEP 7 version must support firmware V4.7.
Which CPU 1214 FC integrated resources arrangement applies to 6ES7214-1HF40-0XB0?
Compact fail-safe CPU with onboard I/O and expansion interfaces.
Which CPU and Digital inputs values define the CPU 1214 FC integrated resources configuration 6ES7214-1HF40-0XB0?
CPU: 1214 FC DC/DC/relay; Digital inputs: 14 × 24 V DC.
Before commissioning 6ES7214-1HF40-0XB0, which Fail-Safe I/O Map check matters most?
Relay outputs define a different load interface from transistor-output FC variants.
Which lifecycle status is documented for 6ES7214-1HF40-0XB0 when reviewing Fail-Safe I/O Map?
PM300 Active Product; phase-out effective 1 November 2026.
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